There was a startup company for a short time in San Diego called Neural Semiconductor. I did placements for two different designs for them, but their money ran out before I could get paid. Fortunately the key engineer there, Stan Tomlinson, went on to Orincon and carried on to produce a Digital Neural Network Architecture chip (DNNA). They knew exactly what they wanted. I stitched them up into a long chain with a VME interface and built them a few prototypes. This was a stochastic chip that used logic gates to multiply and add. It arguably could do 1.76 GFlops on this board (using AND/OR gates) equivalent to 30 i860 RISC chips.