1984-7: TI PAC20 on VME

Texas Instruments Process Automation Center (TI-PAC, Dallas) is where I went to learn VME design and manage a small group of engineers.  We were designing an IC tester for the new SMD bipolar TTL logic line (The IMPACT I).  It would have 4 test heads.  I worked with one of my EE’s, Steve Florence, to design and build this.  It was one of the very first almost entirely surface mount processors.  I also got involved in VME standards work while there.  This was a 68020 with 68881 FPU etc. and up to 4 meg of DRAM, plus some PROM.  It also had provision for two daughterboards for parallel interface to the test head, and a spare.  It got a lot of compliments from leaders in the VME industry because of it being a first in surface mount technology..

TI PAC20 MC68020/68881 IC tester controllerThis is what the whole controller looked like when loaded, and one of the test heads is shown under that.  I also provided the design of the radial backplane interface, drive, and impedance issues.  T.I.  PAC20 IC tester and controllerThere was a renaissance going on in the neural network field then, and I started hanging out with Dean Collin’s neural network group in Heilmeier’s Division at TI.  I also got involved with the Metroplex Institute for Neural Dynamics (MIND).  I could not get any coverage to work on NN in the TI Semiconductor Division.  So I moved on when SAIC offered a job back in San Diego.