This is the SAIC Delta Floating Point Coprocessor board on the left assembled as intended to go into a PC. Shown on the right is the double-sided surface mount layout I was responsible for with some of the 18 or so daughter boards of multiple types. The daughter cards for DRAM, etc. were done by Les Hicks and George Works as I recall. This system design was conceived by Works and used a pair of bipolar BIT Inc. processors to implement an efficient stream processor for artificial neural networks. It could pull an instruction, and two operands on every clock cycle to do multiply-and-accumulate or other microcode matrix operations at a 22MFlop rate. This was patented. Unfortunately, it was very heavy, power hungry, hot, and expensive, and it did not have a long product life. It was eclipsed by Sky Computers and Mercury Systems DSP offerings before it got into meaningful production to the best of my knowledge unless the DOD gave it new life outside the public eye.