This is the SLAC Fastbus Controller. It was my first hardware design. Fastbus (IEEE 960) is a data acquisition standard we came up with to replace CAMAC for use in High Energy Physics experiments for A/D, D/A, and monitor and control. This design consisted of about 13 MMI PALs and ECL to TTL level translating transceivers to match Fastbus to Multibus levels. By careful layering of plastic and aluminum shims I created a novel card guide that allowed plugging a standard-size multibus CPU card into the controller to make it a real controller. This worked successfully with both Intel 8086 and MC68000 CPU boards. The CPU shown is a ‘SUN workstation’ CPU. I built it from Andy Bechtolsheim’s artwork when he was a Doctoral student at Stanford working with Prof. Forest Basket on the Stanford University campus Network (‘SUN’). Andy went on to found SUN Microsystems with Bill Joy which evolved into the Arista Networks switch powerhouse of today.

I learned hardware design and bus standards from scratch with much helpful advice from the late Dr. Leo Paffrath, Dr. Dave Gustavson, Dr. Andy Bechtolsheim, and no small encouragement from Dr. Ray Larson. Ray later started the IEEE Smart Village project. A staff tech doing D&E-size mechanical drawings, patient office-mate oracles like Bob Gray, and an old-fashioned tape-over-mylar layout expert helped make this project materialize. Without all their help and indulgence answering my questions (and the TI ‘TTL Databook’) I would still be doing software. With this experience, I was able to move on to Texas Instruments into a small hardware team lead position.

The two mile long SLAC ‘linac’ and its early experimental areas is shown below straddling the San Andreas Fault and freeway i280 at Menlo Park adjacent to Stanford University.